Why Samsung is lagging behind TSMC in the competition to take AI GPU orders

The advanced packaging technique called Chip-on-Wafer-on-Substrate
The advanced packaging technique called Chip-on-Wafer-on-Substrate

Global customers have lined up to buy Nvidia’s graphics processing units (GPUs), but the limited supply has driven up prices. GPUs are the brains of Generative Artificial Intelligence (AI) programs like ChatGPT. Nvidia commands more than 90 percent of the global AI GPU market.

The recent rapid development of the AI ‚Äč‚Äčindustry has fueled global demand for Nvidia’s GPUs, but they are still in short supply. Nvidia’s flagship A100 and H100 GPUs, famous for their use for ChatGPT, are entirely outsourced to TSMC. In early June, TSMC decided to increase its packaging capacity at the request of Nvidia.

TSMC can exclusively distribute Nvidia chips thanks to its packaging technology called Chip on Wafer on Substrate (CoWoS). AI chips that process data quickly and efficiently are technically demanding and require advanced packaging technology. The importance of packaging technology as a means to boost semiconductor performance was underscored when ultra-micro manufacturing processes recently reached their limits at two hundred thousandths of the thickness of a human hair.

In the packaging process, the chips are stacked three-dimensionally into a single thin film so that the distances between them are reduced. This makes the connections between chips faster, leading to massive performance improvements of up to 50 percent or more. How chips are stacked and packaged makes a huge difference in performance.

TSMC first introduced CoWoS technology in 2012 and has continued to upgrade its packaging technology ever since. Meanwhile, the global semiconductor industry has seen the emergence of new technology that combines different types of semiconductors, such as memory and system semiconductors, to create entirely new classes of semiconductors (heterogeneous integration). Now, Nvidia, Apple, and AMD can’t make their core products without TSMC and its packaging technology.

That means Nvidia can get its hands on the finished chips by relying on TSMC for the packaging and foundry work.

In other words, users of foundry services will pay attention to not only how well a foundry company can produce chips, but also how well it can package those chips after producing them. TSMC has other packaging technologies in addition to CoWoS. Besides TSMC, Taiwanese semiconductor packaging specialists have already dominated the global market. Including ASE, company no. 1 in the world in this field, Taiwanese companies hold a 52% share of the global packaging market.

This unparalleled packaging technology explains why global IT giants like Nvidia and Apple still want to use TSMC’s production lines even though Samsung Electronics managed to mass-produce 3nm semiconductors before TSMC in 2022. As a result, all the big foundry orders for AI and self-driving semiconductors have gone to TSMC, and the market share gap is widening between that company and Samsung. TSMC showed its intentions to definitely win the competition with Samsung when it started the operation of Fab 6, a semiconductor manufacturing plant specializing in high-end packaging, on June 8th.

Samsung has also launched an all-out effort to develop advanced packaging technology that will take chip performance to the next level. At the Samsung Foundry Forum 2023 held on June 27, Samsung Electronics announced an all-out packaging war with TSMC, saying it will not only advance its packaging technology but also grow related ecosystems. To this end, the Korean semiconductor giant has even introduced the concept of a one-stop packaging service. It plans to provide custom packaging services for customers who want to improve the performance of their chips. In the long term, it will create a new line dedicated to packaging.

To overcome TSMC’s CoWoS, Samsung is also developing a more advanced concept of I-cube and X-cube packaging technologies. In particular, the Korean chipmaker is reportedly focusing its research on three-dimensional (3D) packaging in which multiple chips are stacked vertically to boost performance. “Samsung is preparing a more advanced way, three-dimensional semiconductor packaging,” a semiconductor industry insider said. “Soon there will be a head-on collision between Samsung and TSMC in packaging.”

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Image Source : www.businesskorea.co.kr

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